Analysis of FPGA based Designs using Min-max Number

نویسنده

  • Shruti Patil
چکیده

Cost of an FPGA implementation is given by propagation time and number of logic cells required. Before implementation, a rough idea of cost of design is necessary in order to take design decisions related to target technology to be selected, FPGA implementation, decomposition strategies, etc. This paper attempts to perform a complete mathematical analysis of general functions to be implemented on a general target technology, to give an idea of the cost of the FPGA design. It does so by stating mathematical formulae that directly give the min-max number of logic cells required to implement a function.

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

FPGA Design Security Solution Using MAX II Devices

This document provides a solution to prevent the FPGA designs from being copied. It allows the FPGA design to remain secure even if the configuration bitstream is captured. This is accomplished by disabling the functionality of the user design within the FPGA until handshaking tokens are passed to the FPGA from the MAX ® II device. The MAX II devices are selected for generating the handshaking ...

متن کامل

Real-Time Kinematic Network of Tehran, from Design to Application

Following the request of the Tehran municipality and in order to provide the spatial information required in their various projects, a real-time kinematic network has been designed for Tehran. Based on the existing measures such as the dilution of precision at the network point positions, two different designs have been proposed. A minimum number of six GNSS stations are used in both of the pro...

متن کامل

Generation of Three-Phase PWM Inverter using Xilinx FPGA and its Application for Utility Connected PV System (RESEARCH NOTE)

Analysis and practical implementation of the regular symmetric sampled three-phase PWM inverter waveform has been presented in this paper. It is digitally implemented on a Xilinx field programmable gate array FPGA, and the essential considerations involved in the feasibility of using a Xilinx XC4008E software-based to generate PWM has been discussed. All the necessary Xilinx hardware/software t...

متن کامل

Low Complexity Converter for the Moduli Set {2^n+1,2^n-1,2^n} in Two-Part Residue Number System

Residue Number System is a kind of numerical systems that uses the remainder of division in several different moduli. Conversion of a number to smaller ones and carrying out parallel calculations on these numbers will increase the speed of the arithmetic operations in this system. However, the main factor that affects performance of system is hardware complexity of reverse converter. Reverse co...

متن کامل

Compact FPGA-based True and Pseudo Random Number Generators

Two FPGA based implementations of random number generators intended for embedded cryptographic applications are presented. The first is a true random number generator (TRNG) which employs oscillator phase noise, and the second is a bit serial implementation of a Blum Blum Shub (BBS) pseudorandom number generator (PRNG). Both designs are extremely compact and can be implemented on any FPGA or PL...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

برای دانلود متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 2006